This application is based upon and claims the benefit of priority from the prior Japanese Patent Applications No. 11-022688, filed Jan. 29, 1999; No. 11-041343, filed Feb. 19, 1999; and No. 11-267207, filed Sep. 21, 1999, the entire contents of which are incorporated herein by reference.
The present invention relates to a semiconductor device and a method of manufacturing the same, particularly, to improvement in performance of the gate insulating film.
With progress in miniaturization of a MOSFET, the gate electrode is required to have a lower resistance. Also, in a gate electrode using a polycrystalline silicon (polysilicon), the problem of depletion is not negligible nowadays. Therefore, it is of high importance to develop a gate structure consisting of a metal single layer. Concerning the gate insulating film, it is proposed to use a film made of a material having a high dielectric constant, e.g., TiO2, in place of SiO2 for decreasing the equivalent oxide thickness of the gate insulating film.
FIGS. 14A to 14C show a conventional manufacturing process. In the first step, a TiO2 film 502 is formed as a gate insulating film by a LP-CVD method in a thickness of about 10 nm on a silicon substrate 500, as shown in FIG. 14A. Used as the CVD gas is, for example, Ti(C11H19O2)2Cl2. Then, a TiN film 503 in a thickness of 10 to 20 nm is formed on the TiO2 film 502 by a CVD method under a gaseous atmosphere of TiCl4 and NH3 as shown in FIG. 14B. The TiN film 503 acts as a barrier metal layer serving to prevent diffusion of a gate electrode material into the gate insulating film or to control the work function. Further, a metal electrode 504 consisting of W, Al, Cu, etc. is formed by CVD on the TiN film 503, as shown in FIG. 14C.
However, the conventional method described above gives rise to a serious problem. Specifically, it is difficult to form the TiO2 film 502 having oxygen supplied thereinto completely in the step shown in FIG. 14A. Since the oxygen shortage functions as a donor in the TiO2 film 502, the insulating properties of the TiO2 film are markedly deteriorated by a slight oxygen shortage. It should also be noted that the impurities contained in the CVD gas such as carbon and chlorine are left unremoved so as to cause the oxygen shortage. Further, the CVD film tends to become lower in density than the oxide film formed by thermal oxidation, as can be seen from CVD of a silicon oxide film. As a result, an oxygen shortage tends to be caused. Such being the situation, it is difficult to form a transistor having good characteristics and a high reliability.
On the other hand, the TiO2 film 502 constituting the conventional gate insulating film leaves room for further improvement in the film structure. FIGS. 15A and 15B schematically show the film structure of the TiO2 film 502, wherein FIG. 15A is a cross sectional view, and FIG. 15B is a plan view.
In forming the TiO2 film 502 in the step shown in FIG. 14A, a clear crystal grain boundary 512 is formed between adjacent crystal grains 511 of TiO2, as shown in FIGS. 15A and 15B. As a result, the electrical insulating properties of the TiO2 film constituting the gate insulating film are markedly deteriorated, making it very difficult to prepare a MIS transistor having good characteristics and a high reliability.
An object of the present invention is to provide a semiconductor device in which insulating properties of the insulating film such as a gate insulating film are improved so as to improve the characteristics and reliability of the semiconductor device and a method of manufacturing the particular semiconductor device.
According to a first aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising:
forming a metal compound film directly or indirectly on a semiconductor substrate;
forming a metal-containing insulating film consisting of a metal oxide film or a metal silicate film by oxidizing the metal compound film; and
forming an electrode on the metal-containing insulating film.
In the first aspect of the present invention, the metal-containing insulating film may consist of a plurality of first insulating regions formed of grains containing a metal oxide of a metal element constituting the metal compound film and a second insulating region formed of an amorphous insulating material in a region except the first insulating regions.
According to a second aspect of the present invention, there is provided a semiconductor device, comprising:
a semiconductor substrate;
a metal-containing insulating film formed directly or indirectly on the semiconductor substrate, the metal-containing insulating film consisting of a plurality of first insulating regions formed of grains containing a metal oxide and a second insulating region formed of an amorphous insulating material in a region except the first insulating regions; and
an electrode formed on the metal-containing insulating film.
According to a third aspect of the present invention, there is provided a semiconductor device, comprising:
a first metal oxide film formed directly or indirectly on a semiconductor substrate;
a second metal oxide film formed on the first metal oxide film; and
a gate electrode formed on the second metal oxide film,
wherein, the decrease of the Gibbs free energy at the time when a metal constituting the gate electrode forms an oxide is larger than that at the time when a metal constituting the first metal oxide film forms an oxide, and the decrease of the Gibbs free energy at the time when a metal constituting the second metal oxide film forms an oxide is larger than or equal to that at the time when the metal constituting the gate electrode forms an oxide.
According to a fourth aspect of the present invention, there is provided a semiconductor device, comprising:
a semiconductor substrate having a trench;
a metal-containing insulating film consisting of a metal oxide film or a metal silicate film and formed along the inner surface of the trench, the metal-containing insulating film constituting a gate insulating film; and
a gate electrode formed on the metal-containing insulating film,
wherein a thickness A of the metal-containing insulating film in the center of the bottom portion, a thickness B of the metal-containing insulating film in the center of the side wall portion, and a thickness C of the metal-containing insulating film at the corner portion along a line joining the intersection between the bottom portion and the side wall portion of the trench and the intersection between the upper surface and the side wall surface of the metal-containing insulating film meet the relationship C2 greater than (A2+B2).
According to a fifth aspect of the present invention, there is provided a semiconductor device, comprising:
a semiconductor substrate;
a gate insulating film formed on the semiconductor substrate;
a gate electrode formed on the gate insulating film;
a side wall insulating film formed along a side wall of the gate electrode;
a metal oxide film formed on the upper surface of the gate electrode;
diffusion layers formed within those portions of the semiconductor substrate which are positioned on both sides of the gate electrode;
source-drain regions formed on the diffusion layers and in contact with the side wall insulating film; and
silicide films formed on the source-drain regions, the upper surface of the silicide film being substantially flush with the upper surface of the metal oxide film.
In the fifth aspect of the present invention, the silicide film contains a noble metal forming a silicide at a temperature lower than the melting point of aluminum. The silicide film contains at least one of palladium, nickel, platinum and cobalt. Also, the gate electrode consists of aluminum, titanium, zirconium, hafnium, tantalum, niobium, vanadium or a nitride of any of these metals.
The present invention also provides semiconductor devices A and B given below and methods C to H of manufacturing a semiconductor device given below:
A. A semiconductor device, comprising:
a gate insulating film formed on a semiconductor substrate;
a gate electrode formed on the gate insulating film;
a side wall insulating film formed along the side wall of the gate electrode;
source-drain regions formed on those portions of the semiconductor substrate which are positioned on both sides of the gate electrode and do not have a contaminated layer, the source-drain regions having a facet, and the upper surfaces of the source-drain regions being positioned higher than the upper surface of the semiconductor substrate;
diffusion layers formed within the semiconductor substrate and positioned below the source-drain regions; and
silicide films formed on the source-drain regions.
B. A semiconductor device, comprising:
a gate insulating film formed on a semiconductor substrate;
a gate electrode formed on the gate insulating film;
a side wall region formed along the side wall of the gate electrode, the side wall region consisting of a plurality of insulating regions differing from each other in dielectric constant; and
source-drain regions formed on those portions of the semiconductor substrate which are positioned on both sides of the gate electrode, the upper surfaces of the source-drain regions being positioned higher than the upper surface of the semiconductor substrate.
In semiconductor device B of the present invention, at least one of the plural insulating regions constituting the side wall region is formed of the air.
C. A method of manufacturing a semiconductor device, comprising:
forming a first insulating film on a semiconductor substrate;
forming a gate electrode on the first insulating film;
selectively forming a second insulating film on the upper surface of the gate electrode;
forming a third insulating film on the side wall of the gate electrode;
applying a treatment with phosphoric acid so as to selectively remove that portion of the first insulating film which is positioned outside the gate electrode and the third insulating film so as to expose the surface of the semiconductor substrate;
forming an epitaxial layer having a facet on the exposed portion of the semiconductor substrate;
injecting an impurity into the epitaxial layer to form a first diffusion layer; and
diffusing the impurity within the first diffusion layer to form a second diffusion layer in a surface region of the semiconductor substrate.
In the manufacturing method C of the present, invention, the treatment with phosphoric acid should be carried out at a temperature falling within a range of between room temperature and 180xc2x0 C. Preferably, the phosphoric acid treatment should be carried out at 160xc2x0 C.
D. A method of manufacturing a semiconductor device, comprising:
forming a first insulating film on a semiconductor substrate;
forming a dummy gate on the first insulating film;
forming a second insulating film on the side surface of the dummy gate;
applying a treatment with phosphoric acid to selectively remove that portion of the first insulating film which is positioned outside the dummy gate and the second insulating film so as to expose the surface of the semiconductor substrate;
forming an epitaxial layer having a facet on the exposed semiconductor substrate;
implanting impurity ions into the epitaxial layer to form a first diffusion layer;
diffusing the impurity within the first diffusion layer to form a second diffusion layer in a surface region of the semiconductor substrate;
forming a silicide film on the first diffusion layer;
forming an interlayer insulating film;
flattening the interlayer insulating film to expose the surface of the dummy gate;
removing the dummy gate and the first insulating film to form an opening;
forming a gate insulating film within the opening;
forming a reaction preventing film on the gate insulating film;
forming a metal film on the reaction preventing film; and
flattening the gate insulating film, the reaction preventing film and the metal film to expose the surface of the interlayer insulating film.
In the manufacturing method D of the present invention, the gate insulating film consists of a tantalum oxide film, the reaction preventing film consists of a titanium nitride film, and the metal film consists of an aluminum film.
E. A method of manufacturing a semiconductor device, comprising:
forming a dummy gate on a semiconductor substrate;
forming a first side wall insulating film on the side wall of the dummy gate;
forming an epitaxial layer on the exposed surface of the semiconductor substrate;
injecting an impurity into the epitaxial layer to form a first diffusion layer;
forming a second side wall insulating film on the side surface of the first side wall insulating film;
forming a third side wall insulating film on the side surface of the second side wall insulating film;
injecting an impurity into the semiconductor substrate to form a second diffusion layer;
forming a first interlayer insulating film;
flattening the first interlayer insulating film to expose the surface of the dummy gate;
removing the dummy gate to form a first trench;
forming a gate insulating film within the first trench; and
forming a gate electrode on the gate insulating film.
The manufacturing method E of the present invention further comprises removing the first and third side wall insulating films to form second and third trenches after formation of the gate electrode and subsequently forming a second interlayer insulating film.
F. A method of manufacturing a semiconductor device, comprising:
forming a dummy gate on a semiconductor substrate;
forming a first side wall insulating film on the side wall of the dummy gate;
forming a first epitaxial layer in contact with the first side wall insulating film on the exposed surface of the semiconductor substrate;
injecting an impurity into the first epitaxial layer to form a first diffusion layer;
forming a second side wall insulating film on the side surface of the first side wall insulating film;
forming a third side wall insulating film on the side surface of the second side wall insulating film;
forming a second epitaxial layer on the first diffusion layer;
injecting an impurity into the second epitaxial layer to form a second diffusion layer;
forming a first interlayer insulating film;
flattening the first interlayer insulating film to expose the surface of the dummy gate;
removing the dummy gate to form a first trench;
forming a gate insulating film within the first trench;
forming a gate electrode on the gate insulating film;
removing the first and third side wall insulating films to form second and third trenches, respectively; and
forming a second interlayer insulating film.
In the manufacturing method F of the present invention, the second interlayer insulating film may be formed to fill the second and third trenches or to form free spaces within the second and third trenches.
G. A method of manufacturing a semiconductor device, comprising:
forming a gate insulating film on a semiconductor substrate;
forming a gate electrode on the gate insulating film;
forming a first side wall insulating film on the side surface of the gate electrode;
forming an epitaxial layer on the exposed surface of the semiconductor substrate;
injecting an impurity into the epitaxial layer to form a first diffusion layer;
forming a second side wall insulating film on the side surface of the first side wall insulating film;
forming a third side wall insulating film on the side surface of the second side wall insulating film; and
injecting an impurity into the semiconductor substrate to form a second diffusion layer.
H. A method of manufacturing a semiconductor device, comprising:
forming a insulating film on a entire surface of a semiconductor substrate provided with source-drain regions;
flattening the insulating film to expose the surface of the source-drain regions; and
selectively converting the surface region of the exposed portion of the source-drain regions into a silicide film.
In the manufacturing method H of the present invention, upper portions of the source-drain regions may be formed of an epitaxial layer.
In the manufacturing method H of the present invention, formation of the silicide film may include the steps of, forming a first metal film on a entire surface of the substrate after exposing the surface of the source-drain regions, applying a heat treatment to cause reaction between the source-drain regions and the first metal film, and removing the unreacted first metal film. It is possible for the unreacted first metal film to be removed by a CMP method.
In the manufacturing method H of the present invention, further comprises oxidizing an upper surface of a gate electrode formed of a second metal film different from the first metal film, before forming the silicide film.
In the manufacturing method H of the present invention, the first metal film is formed of a noble metal forming a silicide at a temperature lower than the melting point of aluminum. The first metal film includes palladium, nickel, platinum and cobalt. Also, the first metal film may be formed of an alloy containing at least one of these metals. Further, the second metal film is formed of aluminum, titanium, zirconium, hafnium, tantalum, niobium, vanadium or a nitride of any of these metals.
Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out hereinafter.